DT_INT-18 version 3.3 March 24, 2008
Available Interrupt Sources 16-bit
Interrupt | Description |
---|---|
INT0INT | INT0 External Interrupt |
INT1INT | INT1 External Interrupt |
INT2INT | INT2 External Interrupt |
INT3INT | INT3 External Interrupt |
RBC_INT | RB Port Change |
TMR0_INT | TMR0 Overflow |
TMR1_INT | TMR1 Overflow |
TMR2_INT | TMR2 to PR2 Match |
TMR3_INT | TMR3 Overflow |
TMR4_INT | TMR4 Overflow |
TX_INT | USART Transmit |
TX1_INT | USART1 Transmit |
TX2_INT | USART2 Transmit |
RX_INT | USART Receive |
RX1_INT | USART1 Receive |
RX2_INT | USART2 Receive |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
TMR4_INT | TMR4 Overflow |
[[RX_INT]] ------ USART Receive\\
[[RX1_INT]] ------ USART1 Receive\\
[[RX2_INT]] ------ USART2 Receive\\
[[CMP_INT]] ------ Comparator\\
[[EE_INT]] ------ EEPROM/FLASH Write Operation\\
[[BUS_INT]] ------ Bus Collision\\
[[LVD_INT]] ------ Low Voltage Detect\\
[[HLVD_INT]] ------ High/Low Voltage Detect\\
[[PSP_INT]] ------ Parallel Slave Port Read/Write\\
[[AD_INT]] ------ A/D Converter\\
[[SSP_INT]] ------ Master Synchronous Serial Port\\
[[CCP1_INT]] ------ CCP1 Interrupt\\
[[CCP2_INT]] ------ CCP2 Interrupt\\
[[CCP3_INT]] ------ CCP3 Interrupt\\
[[CCP4_INT]] ------ CCP4 Interrupt\\
[[CCP5_INT]] ------ CCP5 Interrupt\\
[[USB_INT]] ------ USB Interrupt\\
[[OSC_INT]] ------ Oscillator Fail\\
[[CMP0_INT]] ------ Comparator 0 - 18F1230/1330\\
[[CMP1_INT]] ------ Comparator 1\\
[[CMP2_INT]] ------ Comparator 2\\
[[SPP_INT]] ------ Streaming Parallel Port\\
[[BUS1_INT]] ------ Bus 1 Collision\\
[[BUS2_INT]] ------ Bus 2 Collision\\
[[ECCP1_INT]] ------ ECCP1\\
[[LCD_INT]] ------ LCD Driver\\
[[PMP_INT]] ------ Parallel Master Port\\
[[SSP1_INT]] ------ Synchronous Serial Port 1\\
[[SSP2_INT]] ------ Synchronous Serial Port 2\\
[[TMR5_INT]] ------ Timer 5\\
[[PT_INT]] ------ PWM Time Base\\
[[IC1IF_INT]] ------ Motion Feedback\\
[[IC2QEIF_INT]] ------ Motion Feedback\\
[[IC3DRIF_INT]] ------ Motion Feedback\\
-----
'''USB Module'''\\
-----
[[USB_INT]] ------ USB Interrupt (funnel)\\
[[USB_ACTV_INT]] ------ Bus Activity Detect\\
[[USB_ERR_INT]] ------ USB Error INT (funnel)\\
[[USB_RST_INT]] ------ USB Reset\\
[[USB_IDLE_INT]] ------ Idle Detect\\
[[USB_STALL_INT]] ------ A STALL Handshake\\
[[USB_TRN_INT]] ------ Transaction Complete\\
[[USB_SOF_INT]] ------ START-OF-FRAME Token\\
'''USB ERROR Flags'''\\
[[USB_BTO_INT]] ------ Bus Turnaround Time-out\\
[[USB_BTS_INT]] ------ Bit Stuff Error\\
[[USB_CRC16_INT]] ------ CRC16 Failure\\
[[USB_CRC5_INT]] ------ CRC5 Host Error\\
[[USB_DFN8_INT]] ------ Data Field Size Error\\
[[USB_PID_INT]] ------ PID Check Failure\\
-----
'''Ethernet Module'''\\
-----
[[ETH_INT]] ------ Ethernet Int (funnel)\\
[[ETH_DMA_INT]] ------ DMA Interrupt\\
[[ETH_LINK_INT]] ------ Link Status Change\\
[[ETH_PKT_INT]] ------ Receive Packet Pending\\
[[ETH_RXER_INT]] ------ Receive Error\\
[[ETH_TXER_INT]] ------ Transmit Error\\
[[ETH_TX_INT]] ------ Transmit\\
-----
'''CAN Module'''\\
-----
[[CAN_ERR_INT]] ------ CAN bus Error\\
[[CAN_IRX_INT]] ------ Invalid Received Message\\
[[CAN_RXB0_INT]] ------ Receive Buffer 0\\
[[CAN_FIFOWM_INT]] ------ FIFO Watermark\\
[[CAN_RXB1_INT]] ------ Receive Buffer 1 \\
[[CAN_RXBn_INT]] ------ Any Receive Buffer\\
[[CAN_TXB0_INT]] ------ Transmit Buffer 0\\
[[CAN_TXB1_INT]] ------ Transmit Buffer 1\\
[[CAN_TXB2_INT]] ------ Transmit Buffer 2\\
[[CAN_TXBn_INT]] ------ Any Transmit Buffer\\
[[CAN_WAKE_INT]] ------ CAN bus Activity Wake-up
Page last modified on February 12, 2018, at 03:51 AM